The first testing of the CERC and PCB

The first testing of the CERC and PCB

The first testing of the CERC and PCB Version II with cosmic rays Catherine Fry Imperial College London CALICE Meeting, CERN 28th 29th June 2004 Prototype ECAL design Hodoscope data DAQ and electronics Wafer alignment The CERC Cosmic signal Cosmic test setup MIP, dynamic range, S/N and comparison of wafers The runs Pedestals, RMS noise and common mode Signal vs. channel Summary Prototype ECAL design 30 layers of silicon and tungsten

Each layer of silicon contains 3 x 3 =9 wafers Each wafer has 6 x 6 =36 pads Each pad is 1 x 1 cm2 2 VFE PCBs per layer, one fully-filled with 6 wafers, one half-filled with 3 wafers 18 channel VFE chips amplify, shape and multiplex the signals from the pads Catherine Fry VFE chips, 2 per CALICE Meeting, CERN, 29/06/04 62 mm Wafers have been tested: low leakage current (few nA), thickness 525m 3% Wafers mounted on VFE PCB with conductive glue 62 mm A VFE PCB with 10(!) wafers the one tested had just one, then two wafers mounted DAQ and electronics

Layers face each other so have 2 types of half-filled VFE PCBs: right and left In 9U VME crate The 30 layers of VFE PCBs are read out through 6 readout boards (CERCs) when triggered The readout boards are housed in a 9U VME crate Catherine Fry CALICE Meeting, CERN, 29/06/04 The CERC Load firmware here Based on CMS tracker FED 8 FE FPGAs on left which digitise over 200 multiplexed signals through twelve 16-bit 500kHz ADC channels Then through FIFO to 8Mbyte memory read out when bandwidth available

One BE FPGA on right, buffers data from FE, performs I/O, configuration, control, trigger control and data readout 8 FE FPGAs Catherine Fry 8MByte memory (not present here) 1 BE FPGA CALICE Meeting, CERN, 29/06/04 All raw data read out, no zero suppression Cosmic test setup Trigger from cosmic rays coincident in upper and lower hodoscope planes Upper x and y planes of hodoscope

Silico n Lower x and y planes of hodoscope The cosmic test bench at LLR Crate containing 1 CERC Catherine Fry PC for run control and data storage Each layer of hodoscope has 16 scintillator strips, slightly overlapping, but only first 8 connected BE firmware was not ready so PC connected to BE via RS232 interface Data read out straight from FE FIFO, one word at a time 8MByte memory not yet available so each event had to be read out before

next trigger not a problem as cosmic rate sufficiently low CALICE Meeting, CERN, 29/06/04 Data stored in ASCII The runs 2 cosmic runs taken over 2 weekends in April 2004: 1st run: 35,100 events 2nd run: 27,100 events 1st run: 1 wafer present, from Moscow State University, and 4 VFE chips: 1, 4, 7 and 10 (4 and 10 connected to the wafer) 2nd run: Another wafer added, from Prague Academy of Sciences, read out through VFE chips 1 and 7 For the 1st run the Russian wafer was centred between the hodoscope layers to maximise the number of cosmic triggers actually passing through the wafer For the 2nd run the Czech wafer was centred In both runs for each event the data was read out from: 16 strips of the 4 hodoscope planes and all 18 channels of all 4 VFE chips, also some configuration data and the event number All data stored on PC Catherine Fry CALICE Meeting, CERN, 29/06/04 Pedestals chip

1 chip 4 chip 7 chip 10 chip 1 chip 4 chip 7 chip 10 Chips: white = not connected to a wafer; turquoise = connected to centred wafer; purple = connected to un-centred wafer Pedestals ~constant between the two runs ADC range: -32768 to +32767 ADC counts (16 bits) Pedestals are a few hundred ADC counts only half of ADC range available Catherine Fry

CALICE Meeting, CERN, 29/06/04 = dead channels RMS noise ne w chip 1 chip 4 chip 7 chip 10 chip 1 chip 4 chip 7 chip 10

Chips: white = not connected to a wafer; turquoise = connected to centred wafer; purple = connected to un-centred wafer RMS noise 8 10 ADC counts Dead channels have RMS noise around 6 ADC counts 7 dead channels in 1st run, one extra dead channel in second run Dead channels ignored in further analysis Chips connected to wafers receiving cosmic rays when hodoscope triggers (4 and 10 in 1st run and 1 and 7 in 2nd run) have slightly higher noise Fry Catherine CALICE Meeting, CERN, 29/06/04 Common mode Pedestal variation for two chips connected to wafer throughout 1st run Common mode RMS for each chip throughout 1st run Pedestals move by a few ADC counts throughout both runs for all four chips

RMS of common mode > RMS / 18 due to variation in common Catherine Fry CALICE Meeting, CERN, 29/06/04 Hodoscope data Only the first 8 strips in each plane are connected In the 1st run this strip had about half as many hits as the others Fairly smooth response over the 8 connected strips in each plane Catherine Fry CALICE Meeting, CERN, 29/06/04 Wafer alignment From the hodoscope data, interpolate the (x,y) position where the cosmic ray crossed the wafer (top plots) Take all signals in wafer > 40 ADC

counts (4 to 5) above pedestal Want to eliminate as much noise as possible For each pad find the average x and y position from the track interpolation Lower plots: hits in x-y for signals > 40 ADC counts can see outline of wafer Catherine Fry CALICE Meeting, CERN, 29/06/04 here can see edge of 1st wafer Cosmic signal For each event use hodoscope data to interpolate wafer (x,y) position Identify the 4 closest pads to this point and subtract common mode and pedestals Plot signal distribution fitting a Gaussian to the pedestal to measure the noise and a Landau-Gaussian convolution and a Landau to the signal to locate the m.i.p. peak Catherine Fry

Landau-Gaussian fits CALICE Meeting, CERN, 29/06/04 MIP, dynamic range, S/N and wafer comparison Value 1st run (Russian wafer) 2nd run (Czech wafer) Noise / ADC counts 8.64 0.01 8.46 0.01 Signal (L-G) / ADC counts 41.95 0.05 43.08 0.05 Signal (L) / ADC counts 43.35 0.04

44.24 0.04 S (L-G) / N 4.9 : 1.0 5.1 : 1.0 1 ADC count / keV 4.8 4.6 ADC dynamic range / m.i.p.s 800 800 require S / N 4 : 1 we have better than requirement require ADC dynamic range 600 m.i.p.s we have better than requirement difference in m.i.p. between wafers 1.3% wafers manufactured to thickness 3% E x m.i.p. difference consistent with possible difference in thickness difference Catherine Fry

CALICE Meeting, 29 June and 2004 use other value in m.i.p. between fits CERN, take28L-G value th th Signal vs. channel One channel with sufficient stats to fit a Landau distribution to the signal located signal with a Landau fit (insufficient stats per channel for LandauGaussian convolution to work) only 30 channels (out of 72) had sufficient stats to fit signal fit constant to each wafer: 1st wafer

slightly higher than values from all channels together, even with Landau fit, but bigger errors Need to take longer runs for more stats to better estimate the signal for each channel of VFE chip m.i.p.1 = 47.39 0.13 Catherine Fry 2nd wafer CALICE Meeting, CERN, 29/06/04 Summary RMS noise 8-9 ADC counts Pedestals few hundred ADC counts lose half ADC range Some common mode noise, few ADC counts 1 m.i.p. = 42 43 ADC counts S / N = 5 : 1 better than required ADC dynamic range = 800 m.i.p.s better than required m.i.p. difference between wafers consistent with possible difference in thickness need more stats to accurately measure signal for each channel Catherine Fry CALICE Meeting, CERN, 29/06/04

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