IDE Controller

IDE Controller

IDE Controller Group Members Brian Kulig Graig Plumb James Pierpont Saif Shaikh Advisor Arun Ramanathan Development of an Ultra DMA Module for a Hard Disk Controller Specifications IDE ATA5 Standards RTL Description of PIO and Ultra DMA (Direct Memory Access) Module in Verilog HDL (Support for PIO Modes 0 to 4 & UltraDMA Modes 0 to 4) Behavioral description of the Hard Disk

Interface Functional and Timing Simulations using Cadence VerilogXL Architecture IDE CHANNEL 0 PIO MODULE Fifos and Rest IDE FSM To Hard Disk DMA MODULE of System PIO MODULE Fifos and Rest

of System IDE FSM To Hard Disk DMA MODULE IDE CHANNEL 1 Ultra DMA Modes 0-4 Data In(Out) Initiate Data-in(out) Burst Transfer the Data Pause Data-in(out) Burst Terminate Data-in(out) Burst Ultra DMA Constraints Ultra DMAMode

Cycle Time (nanoseconds) Mode 0 240 Maximum Transfer Rate (MB/s) 16.7 Defining Standard Mode 1 160 25 ATA/ATAPI-4 Mode 2

120 33.3 ATA/ATAPI-4 Mode 3 90 44.4 ATA/ATAPI-5 Mode 4 60 66.7 ATA/ATAPI-5 ATA/ATAPI-4

Programmed I/O Modes 0-4 Replicate Timing Diagrams Presented In ATA/ATAPI - 5 Standards Much Simpler Than Ultra DMA Programmed I/O Constraints Cycle Time (nanoseconds) Mode 0 600 Maximum Transfer Rate (MB/s) 3.3

Defining Standard Mode 1 383 5.2 ATA Mode 2 240 8.3 ATA Mode 3 180 11.1

ATA-2 Mode 4 120 16.7 ATA-2 ATA Course Of Action Two People Work on Programmed I/O Two People Work On Ultra DMA Finish PIO And Focus On Ultra DMA

Develop Behavioral Description To Simulate Hard Disk Simulate And Test Our Interface Gantt Chart Feb 22-28 Become Familiar with Tools Design PIO Mode Software to Simulate HDD Design of UDMA Mode Simulate Entire Operation Project Website March 1-8

March 9-15 March 25-31 April 1-7 April 8-14 April 15-21 April 22-30 May 1-8 Final Product

Verilog RTL Description That Represents Ultra DMA And PIO Modules Behavioral Description of Hard Disk Interface References General IDE Information: http://www.pcguide.com/ref/hdd/in dex.htm http://www.hardwarecentral.com/h ardwarecentral/tutorials/39/1/ ATA5 Specification: http://www.t13.org

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